96 lines
4.7 KiB
C
96 lines
4.7 KiB
C
/*
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* Copyright (C) 2020-2025 Roger Clark, VK3KYY / G4KYF
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*
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* Using some code from NXP examples
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*
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*
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* Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer
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* in the documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. Use of this source code or binary releases for commercial purposes is strictly forbidden. This includes, without limitation,
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* incorporation in a commercial product or incorporation into a product or project which allows commercial use.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _POWER_MANAGER_H_
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#define _POWER_MANAGER_H_
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#include <stdint.h>
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Power mode definition used in application. */
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typedef enum _app_power_mode
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{
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kAPP_PowerModeMin = 'A' - 1,
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kAPP_PowerModeVlpr, /*!< Very low power run mode. All Kinetis chips. */
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kAPP_PowerModeRun, /*!< Run mode. All Kinetis chips. */
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kAPP_PowerModeHsrun /*!< High-speed run mode. Chip-specific. */
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} app_power_mode_t;
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/*!
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* @brief Power mode user configuration structure.
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*
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* This structure defines Kinetis power mode with additional power options and specifies
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* transition to and out of this mode. Application may define multiple power modes and
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* switch between them.
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* List of power mode configuration structure members depends on power options available
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* for specific chip. Complete list contains:
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* mode - Kinetis power mode. List of available modes is chip-specific. See power_manager_modes_t
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* list of modes. This item is common for all Kinetis chips.
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* enableLowPowerWakeUpOnInterrupt - When set to true, system exits to Run mode when any interrupt occurs while in
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* Very low power run, Very low power wait or Very low power stop mode. This item is chip-specific.
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* enablePowerOnResetDetection - When set to true, power on reset detection circuit is disabled in
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* Very low leakage stop 0 mode. When set to false, circuit is enabled. This item is chip-specific.
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* enableRAM2Powered - When set to true, RAM2 partition content is retained through Very low
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* leakage stop 2 mode. When set to false, RAM2 partition power is disabled and memory content lost.
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* This item is chip-specific.
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* enableLowPowerOscillator - When set to true, the 1 kHz Low power oscillator is disabled in any
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* Low leakage or Very low leakage stop mode. When set to false, oscillator is enabled in these modes.
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* This item is chip-specific.
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*/
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extern app_power_mode_t clockManagerCurrentRunMode;
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/* Value of the enum is critical, and controls the clock Multipler and divider
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* External clock frequency to the MCU is 12.288Mhz
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*
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* Clock speed calculation is (Lower bye + 24) / (upper byte + 1) * external clock
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*
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* So 0x0603 = (3 + 24) / ( 6 + 1 ) * 12.288 = 47.396Mhz
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*
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* See data sheet for max clock rates in both Run and HS Run modes.
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* */
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typedef enum
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{
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CLOCK_MANAGER_SPEED_UNDEF = 0x0000,
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CLOCK_MANAGER_SPEED_RUN = 0x0603,
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CLOCK_MANAGER_SPEED_HS_RUN = 0x0205,
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CLOCK_MANAGER_RUN_SUSPEND_MODE = 0x1F00,
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CLOCK_MANAGER_RUN_ECO_POWER_MODE = 0x1F00,
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} clockManagerSpeedSetting_t;
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void clockManagerInit(void);
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void clockManagerSetRunMode(uint8_t targetConfigIndex, clockManagerSpeedSetting_t clockSpeedSetting);
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clockManagerSpeedSetting_t clockManagerGetRunMode(void);
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#endif /* _POWER_MANAGER_H_ */
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